US-TX-Austin: Lead Verification Eng., Test plans, DSP or CPU, VHDL, Verilog; DH (45328632407)

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US-TX-Austin: Lead Verification Eng., Test plans, DSP or CPU, VHDL, Verilog; DH (45328632407)

Postby EuroSoft Inc. » Fri, 08 Oct 2004 23:18:44 GMT

US-TX-Austin: Lead Verification Eng., Test plans, DSP or CPU, VHDL, Verilog; DH (45328632407)
=============================================================================================

Position:     Lead Verification Eng.
Reference:    SMC01732
Location:     Austin TX
Duration:     DH

Skills:       Must have implemented and executed test plans for DSP or CPU
              cores and associated chips. Must have practical experience
              with:
              RTL development methods and languages (VHDL, Verilog)
              test plan specification and implementation
              functional and directed-random test generation
              defect tracking and associated metrics
              modern design verification tools and lanaguages (e.g. Vera,
              Specman, simulation systems)

              Familiarity with the following disciplines is highly
              desirable:
              modern verification techniques (e.g. model checking,
              assertion-based methods)
              testing programmable pipelined processors

              BSEE or BSCS required; MSEE or MSCS preferred.


Scope:        Lead and contribute to design verification for multiple
              logic blocks in a new DSP core and associated SoC products.
              Responsible for work assignment, direction of individual
              contributors, development of block-level test plan and
              actual test development, including writing tests. Will work
              with other verification leads to develop test plans for DSP
              core and associated chips. Will work with customers, design
              managers and other engineering teams to solve issues. Must
              provide technical leadership for a small team of logic
              verification engineers.



Please send your current resume in confidence to < XXXX@XXXXX.COM >

.45328632407.

Similar Threads:

1.US-TX-Austin: Lead Verification Eng., Test plans, DSP or CPU, VHDL, Verilog; DH (45328632407)

US-TX-Austin: Lead Verification Eng., Test plans, DSP or CPU, VHDL, Verilog; DH (45328632407)
=============================================================================================

Position:     Lead Verification Eng.
Reference:    SMC01732
Location:     Austin TX
Duration:     DH

Skills:       Must have implemented and executed test plans for DSP or CPU
              cores and associated chips. Must have practical experience
              with:
              RTL development methods and languages (VHDL, Verilog)
              test plan specification and implementation
              functional and directed-random test generation
              defect tracking and associated metrics
              modern design verification tools and lanaguages (e.g. Vera,
              Specman, simulation systems)

              Familiarity with the following disciplines is highly
              desirable:
              modern verification techniques (e.g. model checking,
              assertion-based methods)
              testing programmable pipelined processors

              BSEE or BSCS required; MSEE or MSCS preferred.


Scope:        Lead and contribute to design verification for multiple
              logic blocks in a new DSP core and associated SoC products.
              Responsible for work assignment, direction of individual
              contributors, development of block-level test plan and
              actual test development, including writing tests. Will work
              with other verification leads to develop test plans for DSP
              core and associated chips. Will work with customers, design
              managers and other engineering teams to solve issues. Must
              provide technical leadership for a small team of logic
              verification engineers.



Please send your current resume in confidence to < XXXX@XXXXX.COM >

.45328632407.



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