[VxW] reading hardware FIFOs across the VME bus

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  • 1. Target Shell security on the Serial Port
    On 3 Aug 2003, Kinger wrote: > fd = open("/tyCo/1", O_RDWR, 0); > ioctl(fd, FIOSETOPTIONS, OPT_TERMINAL); > > ioTaskStdSet(taskNameToId("tShell"), 0, fd); > ioTaskStdSet(taskNameToId("tShell"), 1, fd); > ioTaskStdSet(taskNameToId("tShell"), 2, fd); > > shellOrigStdSet(0, fd); > shellOrigStdSet(1, fd); > shellOrigStdSet(2, fd); > > excJobAdd(shellStart, TRUE,0,0,0,0,0); Don't use excJobAdd() to do this sort of thing. You are adding a job to be executed by tExcTask, which will make that task block for a long time. But tExcTask is needed under certain circumstances to do things like I/O for the serial port drivers. You might be preventing yourself from doing serial I/O. If you really need to do this sort of thing, spawn your own task. > void shellStart(BOOL interactive) > { > char userName[30]; > shellLoginInstall (loginPrompt, NULL); > if (loginPrompt(userName) == OK ) > { > taskRestart(taskNameToId("tShell")); > } > else > taskSuspend(taskNameToId("tShell")); > } Using taskSuspend() for anything other than debugging should be discouraged. You have no idea what tShell might be doing at the moment you spened it -- it might be holding an important lock which could have nasty consequences. Keith -- "One should not pursue goals that are easily achieved." - Albert Einstein, 1915

RE: [VxW] reading hardware FIFOs across the VME bus

Postby Sinn, Larry » Wed, 22 Oct 2003 07:27:18 GMT

Vik:
I'm assuming the FIFO's are mapped to the VME bus like memory or I/O (memory
is better).
Then it's just a matter of assigning a pointer to the address of the FIFO
and doing a read.

	int *io_board_1 = 0xfeeeeee;  /* Assign to proper address */

	buffer[i] = *io_board_1;

Depending on how fast the data is coming, it may be better to generate an
interrupt from your I/O boards when the FIFO's are so full and then just
read that many variables and not check after each read to see if the FIFO's
are empty.
Also if your VxWorks board has DMA you can use that (boards with the
Universe VME controller have DMA built in).

Larry.

Larry Sinn
KLA-Tencor
(408) 875 0247 


-----Original Message-----
From:  XXXX@XXXXX.COM  [mailto: XXXX@XXXXX.COM ] 
Sent: Monday, October 20, 2003 11:12 AM
To:  XXXX@XXXXX.COM 
Subject: [VxW] reading hardware FIFOs across the VME bus


Hello All,
 
How do I read 4 hardware FIFOs , across the VME bus ?
 
(each FIFO resides on a different I/O board ) .The FIFOs are
part of a real-time data acquisition system and are all
4 bytes wide and 1K deep.
 
 
Since I am new to embedded systems , I wanted to know if the following 
approach would work....
 
getValueFromFIFO( addr_X ) --> a function which does the actual read from
H/W.
 
Arguments: Address of the FIFO to read
 
Return Val:  If FIFO is non-empty , it returns value at head of FIFO. 
If empty it returns a special value : FIFO_EMPTY_CODE 
 
 
int buffer[4096]; --> Global Data
int i=0;
 
readAllFifoISR()
{
 
while( getValueFromFIFO(addr1) != FIFO_EMPTY_CODE)
{
  memcpy from FIFO to buffer[i];
  i++;
}
 
while( getValueFromFIFO(addr2) != FIFO_EMPTY_CODE)
{
  memcpy from FIFO to buffer[i];
  i++;
}
 
while( getValueFromFIFO(add4) != FIFO_EMPTY_CODE)
{
  memcpy from FIFO to buffer[i];
  i++;
}
......
......
......
semGive( dataAvailableSemaphore ); /* makes the data Processing thread Run,
                     which does something useful with the data  in Buffer */
}
 
The readAllFifoISR() would be invoked perodically by the system clock 
(using  sysClkConnect( ). ). Of course, I will take care of the problem 
of wrap-around for "i" in the data Processing thread.
 
Does this approach seem a reasonable way of skinning this cat :-). 
Soliciting your help
Thanks,
Vik
_______________________________________________
VxWorks Users Group mailing list
 XXXX@XXXXX.COM 
 http://www.**--****.com/ 

Re: [VxW] reading hardware FIFOs across the VME bus

Postby vik_gupta74 » Sat, 25 Oct 2003 01:03:55 GMT

ello Larry,
Many thanks for your reply . ... I have some follow up queries .......

1.You suggested that it may not be a good idea to check after each
read to see if the FIFO's are empty. But this comparizon would happen
in RAM.....wouldn't the major bottleneck in this system result from
doing a read across the VME bus , ( for every 4 bytes of data,read
from a 1 K deep h/w FIFO ).This reading from all the FIFOS needs to be
completed in a quarter of a millisecond or less. Could you suggest me
a better/alternative way of doing this. Is there any way I could
optimize this, apart from using DMA as you have suggested ?

2. Does VxWorks 5.5 provide any support for using DMA . I would
appreciate if you could you give me a simple example. ( I use the
MVME5100...MPC750 processor running at 450MHz from Motorola , which
has a Universe VME controller on it)

Thanks for your help,
Vik



"Sinn, Larry" < XXXX@XXXXX.COM > wrote in message news:< XXXX@XXXXX.COM >...

RE: [VxW] reading hardware FIFOs across the VME bus

Postby Sinn, Larry » Sat, 25 Oct 2003 04:44:34 GMT

his message is in MIME format. Since your mail reader does not understand
this format, some or all of this message may not be legible.


Vik:

1. I wouldn't read the data in the interrupt service routine.
I would just do a give on a semaphore that starts the read task.

2. Talk to your Motorola rep. He/She should be able to give you a DMA
routine.

Larry.

-----Original Message-----
From: Vik Gupta [mailto: XXXX@XXXXX.COM ]
Sent: Thursday, October 23, 2003 9:07 AM
To: XXXX@XXXXX.COM
Subject: RE: [VxW] reading hardware FIFOs across the VME bus


Hello Larry,
I just posted the following to the group.Would appreciate your inputs.
best regards,
Vik

From: XXXX@XXXXX.COM (Vikas)
Newsgroups: comp.os.vxworks
Subject: Re: [VxW] reading hardware FIFOs across the VME bus
References: < XXXX@XXXXX.COM >
NNTP-Posting-Host: 65.86.158.62
Message-ID: < XXXX@XXXXX.COM >

Hello Larry,
Many thanks for your reply . ... I have some follow up queries .......

1.You suggested that it may not be a good idea to check after each
read to see if the FIFO's are empty. But this comparizon would happen
in RAM.....wouldn't the major bottleneck in this system result from
doing a read across the VME bus , ( for every 4 bytes of data,read
from a 1 K deep h/w FIFO ).This reading from all the FIFOS needs to be
completed in a quarter of a millisecond or less. Could you suggest me
a better/alternative way of doing this. Is there any way I could
optimize this, apart from using DMA as you have suggested ?

2. Does Vx! Works 5.5 provide any support for using DMA . I would
appreciate if you could you give me a simple example. ( I use the
MVME5100...MPC750 processor running at 450MHz from Motorola , which
has a Universe VME controller on it)

Thanks for your help,
Vik

From:
<http://groups.google.com/groups?hl=en&lr=&ie=UTF-8&safe=off&q=author:Larry.
Sinn%40kla-tencor.com+> Sinn, Larry ( <mailto:Larry.Sinn%40kla-tencor.com>
XXXX@XXXXX.COM )
Subject: RE: [VxW] reading hardware FIFOs across the VME bus

This is the only article in this thread
View:
<http://groups.google.com/groups?selm=mailman.8.1066688845.1491.vxwexplo%40c
sg.lbl.gov&output=gplain> Original Format
Newsgroups:
<http://groups.google.com/groups?hl=en&lr=&ie=UTF-8&safe=off&group=comp.os.v
xworks> comp.os.vxworks
Date: 2003-10-20 15:31:09 PST

Vik:

I'm assuming the FIFO's are mapped to the VME bus like memory or I/O (memory

is better).

Then it's just a matter of assigning a pointer to the address of the FIFO

and doing a read.



int *io_board_1 = 0xfeeeeee; /* Assign to proper address */



buffer[i] = *io_board_1;



Depending on how fast the data is coming, it may be better to generate an

interrupt from your I/O boards when the FIFO's are so full and then just

read that many variables and not check after each read to see if the FIFO's

are empty.

Also if your VxWorks board has DMA you can use that (boards with the

Universe VME controller have DMA built in).



Larry.



Larry Sinn

KLA-Tencor

(408) 875 0247





-----Original Message-----

From: XXXX@XXXXX.COM [ <mailto: XXXX@XXXXX.COM >
mailto: XXXX@XXXXX.COM ]

Sent: Monday, October 20, 2003 11:12 AM

To: XXXX@XXXXX.COM

Subject: [VxW] reading hardware FIFOs across the VME bus





Hello All,



How do I read 4 hardware FIFOs , across the VME bus ?


Re: [VxW] reading hardware FIFOs across the VME bus

Postby David Abbott » Sat, 25 Oct 2003 04:59:32 GMT

Some information that may be useful to you:

Programed I/O Read cycles from the VME bus using the MV5100 (Universe
chip) will take 1-1.2 microseconds for each read. This means that you will
be able to read at most 200-250 32bit words in your required "quarter of a
millisecond". If your FIFOs are full this will be a problem.

DMA from FIFOs using the Universe Chip will be at best problematic. The
Universe DMA engine forces source and destination address incrementing for
each word transfered. If your VME FIFO only responds to a single VME
address then the DMA will fail. One can get around this by having the VME
slave respond to a range of addresses (1K for the case of your FIFOs). But
this is moot if you do not have access to the VME Slave firmware (i.e. it
is a third party board).

Regards,
David


On 23 Oct 2003, Vikas wrote:


---------------------------------------------------------
David Abbott Jefferson Lab
Data Acquisition Group MS 6B
602-10 ARC 12000 Jefferson Ave.
EMAIL: XXXX@XXXXX.COM Newport News, VA 23606
Tel: (757) 269-7190
FAX: (757) 269-5519
---------------------------------------------------------


Re: [VxW] reading hardware FIFOs across the VME bus

Postby Doug Owens » Sat, 25 Oct 2003 05:14:36 GMT

hose data rates look hard to attain on the VME bus. Using programmed I/O you
probably get about 4 Mbytes/sec. (about 1 usec. per VME 4 byte
access). The best
I've done with a Universe is about 40 Mbytes/sec. with 8 byte transfers.

If I did the math right - reading 4 1k x 4 FIFOs in 250 usec is a rate of
65 Mb/sec.
which is difficult for any standard VME to do.

Doug Owens
XXXX@XXXXX.COM
At 09:03 AM 10/23/2003 -0700, you wrote:




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